During December 2017, I wrote code for OpenChrome DRM to program the CLE266 and KM400 chipset families’ display FIFO registers when performing a mode setting. I noticed some time ago that OpenChrome DRM was not programming the display FIFO registers at all for these chipsets (code was missing). This was leading CLE266 and KM400 chipsets to display artifacts on the screen after resuming from a standby. Unfortunately, I did not have access to VIA EPIA-M mainboard for several weeks, so I was not able to test the code before committing the code. Lo and behold, I put in the wrong register parameters for CLE266 chipset, and it made a display driven by IGA1 (think of it as display controller #1) to display a highly distorted screen.

Now, I have access to EPIA-M again, and I did put in a fix for OpenChrome DRM drm-next-3.19 branch. drm-next-4.15 or later branch will get the fix within a week.

As an added bonus (?), standby resume is now working correctly, and the artifacts I used to see after resuming from standby no longer shows up.